You will design a MIPS processor but only supporting the R-type instructions in the MIPS Green Sheet. Only the register block in your design will be behavioral but other than that, all your design must be structural.
Your MIPS will take a 32-bit instruction as input, so there will be no instruction memory. Also you will not implement lw/sw instructions therefore there will be no data memory.
The output of your block will be the output of ALU, but you also have to write the result to the $rd register as R-type instructions require.
Write a structural Verilog on Altera Quartus II tool to implement a 32-bit R-type MIPS. Only structural Verilog is allowed, dataflow and behavioral Verilog is not allowed except for the register module. This means you cannot use assign, if- else, always, ?: and etc.
Use hierarchy in your project. For instance, you can design a Register module and use it as an instance in your datapath.
You will not support floating point instructions, I-type instructions or J-type instructions. Also you will not implement jr and slt. All other R-type instructions (including sltu) in the MIPS Green Sheet will be implemented.
You have to simulate all instructions by yourself via Modelsim and put the results in your report as well as to your zip folder including all your project files to submit to Moodle.
You can find MIPS Green Sheet at the last page.
You should write a report (20%) including:
1. Your schematic designs for all modules.
2. Your Verilog modules and their description.
3. Modelsim Simulation results.
4. If not compiling or partial working the explanation of which parts work which parts do not.
You will submit your report, your full project as a zip file to Moodle.
Rules:
1. Behavioral or Dataflow Verilog are not allowed.
2. Not compiling or not simulating solutions can at most get 25pts.
3. You have to use Quartus II tool referred in Moodle.
4. Each day of late submission will get 25 point loss.
5. Write at least Register Block and Alu Control as modules.
6. The name of your top module should be alu32.
7. Do not change the previous ALU you designed. You must use it in your design without any modification inside.
Hint: Start with drawing schematic on paper for each module. Do not hesitate to write 32 lines of logic expressions for each bit of one or two 32-bit numbers whenever required.
Honor code: It is not a group project. Do not take any code from Internet. Any cheating means at least -100 for both sides. Do not share your codes and design to any one in any circumstance. Be honest and uncorrupt not to win but because it is RIGHT!
