Sequential Logic & State Machines Solution

The purpose of this assignment is to practice implementing sequential logic circuits – from an RS Latch up to a Finite State Machine, using CircuitSim. You will build a register from the ground up. Then you will build a One Hot State Machine circuit, based on a provided state machine diagram (see Part 2 below). Then you will build a reduced state machine, using a K-Map to simplify your logic.

You will also build parts of a processor datapath to see how the finite state machine and other components integrate into a full system.

Objectives:

    1. To understand how a register circuit works

    2. To learn how to make a state machine

    3. To become familiar with different state machine styles

    4. To understand K-maps and simplification

    5. To see how state machines can integrate with computer processing

1.2    Task

There are four parts to this assignment.

    1. First, you will build a register in CircuitSim from the ground up.

    2. Second, you will connect the datapath we have partially provided for you.

    3. Third, you will implement a one hot state machine Circuit in CircuitSim, based on the state transition diagram found below.

    4. Fourth, you will complete a K-Map to simplify your state machine circuit, and implement the reduced state machine.

Please read the rest of this document for more detailed instructions and hints.

1.3    Criteria

You must utilize the provided CS 2110 version of CircuitSim, which is available via Docker or the JAR on Canvas. Utilizing other versions of CircuitSim is strictly prohibited and may result in damaged or corrupted files.

Your grade is based on: 1) the correct outputs from your circuits; and 2) not using any banned components. For part 4 (reduced state machine), you will lose points if your circuit does not correspond to your K-Map or if your circuit is not minimal. The grade you see on Gradescope may not be the final grade you receive, as we may run additional tests on your submission.

You will submit three files to Gradescope: latches.sim; fsm.sim; kmap.xlsx.

You may submit your code to Gradescope as many times as you like until the deadline. We will grade your last submission. We have also provided a local checker that you can test your code with. Please submit your code to Gradescope at least once prior to the deadline, to ensure you are not encountering any issues submitting at the last minute.


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    • Instructions

Part 1: For this part of the assignment you will build your own register from the ground up.

    • Implement your circuits in the “latches.sim” file

Part 2: Finish connecting the datapath we have partially provided you

    • Connect the datapath (You should only need the Wiring & Arithmetic tabs of CircuitSim).

    • The datapath will be implemented in the “fsm.sim” file

Part 3: Given a simple state diagram, you will build a state machine in CircuitSim using the “one-hot” style of building state machines.

    • The circuit will be implemented in the “One Hot FSM” subcircuit of the “fsm.sim” file

Part 4: Given the same state diagram from part 3, you will be minimizing the logic by using K-Maps.

    • Fill out the K-Maps located in the spreadsheet named “kmap.xlsx”

    • The reduced circuit will be implemented in the “Reduced FSM” subcircuit of the “fsm.sim” file

Do not change/delete any of the input/output pins. (Though you may change the actual value of the input pins)

2.1    Part 1

For this part of the assignment you will build your own register from the ground up. For more information about each subcircuit refer to your textbook.

2.1.1    RS Latch

You will start by building a RS latch using NAND gates, as described in your textbook. The RS Latch is the basic circuit for sequential logic. It stores one bit of information, and it has 3 important states:

    1. R=1 S=1 : This is called the Quiescent State. In this state the latch is storing a value, and nothing is trying to change that value.

    2. R=1 S=0 : By changing momentarily from the Quiescent State to this state, the value of the latch is changed so that it now stores a 1.

    3. R=0 S=1 : By changing momentarily from the Quiescent State to this state, the value of the latch is changed so that it now stores a 0.

Once you set the bit you wish to store, change back to the quiescent state to keep that value stored.

Notice that the circuit has two output pins; one is the bit the latch is currently storing, and the other is the opposite of that bit.

Note: In order for the RS Latch to work properly, you must not set both R and S to 0 at the same time.