Total Points: 100 - Please read the entire lab before starting.
Part 1: Adders
Half-Adder
Open a new project called Adders. Rename the Page and the Schematic “Half_Adder.” This is an important step, don’t skip it. Create your half-adder. Name the upper input “X” and the lower input “Y.” The outputs should be named “SUM” and “CARRY.” IMPORTANT: Use XOR 7486 Place the ports. DO NOT use DSTIM1 as the inputs for x and y. Use PORTRIGHT-R. This port can be found in the same place as PORTLEFT-L. This is because you will be creating a user-defined part for the half adder later on. If you do use a DSTM1 input at this point you WILL create a problem which will require you to start this part of the lab over. SAVE YOUR DESIGN. Do NOT simulate this design at this point!!! Since you have no DSTM1 inputs applied to your circuit, you CANNOT simulate the circuit. Creating a part.
You can generate a part for any circuit design you create. This increases the flexibility of the software and the simplicity of designs.
To generate a part from your design, complete the following steps.
In the Project Manager window (this is the tab which shows all the folders in the project), select the Half_Adder folder. From the Tools Menu, (top menu bar), select Generate Part. In the Generate Part dialog box which appears, specify the location (Netlist/source file) of the design file that contains the circuit for which the part is to be made – adders.dsn. It may or may not be filled in for you, but if you follow the directions it will be. In the Netlist/source file type drop-down box, specify the source type as Capture Schematic/Design. In the Part Name text box, specify Half_Adder. 6. The name and location of the library that will contain the created part is ….\adders.olb.
Save the source schematic by selecting the Copy Schematic to library check box. This is not checked in the picture above. Be sure you do select it for this part. Be sure Create new part is selected. To specify the schematic folder that contains the design for which the part is to be made, select Half_Adder from the Source Schematic name drop-down list box. Then click Save. You should see something like this. If you don’t see all your inputs then most likely you are using a DSTM as an input instead of a port. This is where you can change the location of your ports, if for some reason Orcad’s part generator doesn’t place your ports where you want them.
Building a Full-Adder
In the Project Manager window, right-click on Adders.dsn and select New Schematic. Name it Full_Adder and click OK. 3 A folder named Full_Adder should appear below the Half-Adder folder. Save the design. Make the full adder circuit design root. Right click on Full_Adder and select Make Root. The Full_Adder folder moves up and a forward slash appears in the folder. Right-click on Full_Adder and select New Page, specify the page name as Full_Adder and click OK. A new page, Full_Adder, gets added below the schematic folder Full_Adder Open the Full_Adder page you just added to open it for editing. In the place part menu, under libraries click on ADDERS. The part you made previously should be here. Use the Half_Adder part you created and make a full adder. Place an OR gate (7432) to the schematic. Then add the wires as shown in the figure below. At this point you are ready to add the stimulus to the design. Add DigStim1, from the Part List, to the inputs on the left of the design. Remember to hit escape when done. Change the Implementation Value of the three inputs to Carry_in, X, and Y, respectively. Carry_in should be the name of the top-most input. Select the Place Port button and add a port (PORTLEFT-L) to the output of the OR gate. Change the port name to CARRY_OUT. Also add a port for the SUM and rename it appropriately.
13. Save the design.
Annotate the design
This is different than what you have done previously so carefully follow all steps. The difference is because you are now annotating a design which uses a usercreated part.
In the Project Manager window, select the .dsn file. Choose Tools - Annotate. In the Packaging tab of the Annotate dialog box, specify whether you want the complete design or only a part of the design to be updated. Select the Update entire design option. In the Actions section, select the Incremental reference update option. Select the Update Occurrences option. Note: When you select the Update Occurrences option, you may receive a warning message. Ignore this message because for all complex hierarchical designs, the occurrence mode is the preferred mode. The Use instances option is shown as preferred because the project type is Analog or Mixed A/D.
For the rest of the options, accept default values and click OK to save your settings. The Undo Warning message box appears.
Click Yes. A message box stating that the annotation will be done appears.
Click OK. Your design is annotated and saved. You can view the value of updated cross reference designators on the schematic page.
Please note that each time you make a change to parts/wires/components in a design you will need to re-annotate the design. If you have used a part you created you may need to update occurances. You definitely will if you change the part design and recreate the part.
Test Your Full Adder
To test your design, you will have to create a stimulus file with 3 inputs. You will need to ensure that whatever frequencies you select for your inputs, you cover all the possible combinations of the three inputs. Remember with 3 inputs there are 2n = 8 possible combinations. It is strongly suggested that with each input you double the previous frequency to ensure you create all possible combinations of the inputs. Once you have created your stimulus file, simulate your design. Build a 2 bit adder.
two-bit adder is one that can add numbers consisting of 2-bits, i.e. 112. Create a part for the Full-Adder. You will need to ensure that you replace the DigiStim inputs on the previous design with ports. If you do not your design will not work right. Use your newly created part to create a 2 bit adder. This is an adder which adds 2 2-bit numbers. Simulate your design using the provided 2BitAdderTest.stl file. Part 2. Deliverables Uploaded to CANVAS
Please name your files in such a way that the name is descriptive of what part of the lab they pertain to. Example: Full_Adder_Circuit, Full_Adder_Stimulus,
Full_Adder_Results. Files named 1 or part1 will not be accepted for full credit.
A pdf of every schematic A pdf of the results of the simulations. A pdf of your simulation file(s). 6