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Computer System Design Lab Assignment 2 Solution

The test data details are indicated for each question

    1. 2-bit 4-to-1 multiplexer: For each of the 4 sources, all the 4 combinations of 2-bit data

    2. 2-bit 4-to-1 priority multiplexer:

        a) Only one request input to the priority encoder is active. For that device, all the 4 combinations of 2-bit data.

        b) At least 2 request inputs to the priority encoder are active. 4 different combinations of the request inputs, and one combination of 2-bit data for combination of request inputs.

    3. 2-bit 1-to-8 demultiplexer: For each of the 8 destination devices, one combination of 2-bit input data

    4. 8-bit comparator:

        a) 2 sets of input operands that are the same.

        b) 2 sets of input operands that are different.

    5. 8-bit parity generator and parity checker: 4 different combinations of 8-bit data. For each combination, 2 cases of 1-bit error in a data bit or the parity bit, and 1 case of no error either in data bits or parity bit.

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