Objective:
In this lab you will design a simple 4-bit ALU and analyse the efficiency in terms of processing delay and power consumption.
Problem:
In the previous labs you had already designed and analysed different 4-bit adders, subtractors and multipliers in Verilog.
By choosing the best candidates from the above, design a 4-bit ALU to perform fast addition, subtraction, bitwise AND and bitwise OR operations. There should be a control unit to select the required operation.
Using the designed 4-bit ALU, implement an 8-bit ALU to perform the same operations.
Post-lab:
Submit a post-lab report with your verified outputs and performance analysis.
All your submissions should be clear and concise.
Copied and late submissions will not be evaluated.
